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Logic Gates

Introduction | Positive and Negative Logic | Gate Representations | Data Sheets | Logic Circuit Schematic | Boolean Expressions for Logic Circuits | Breadboarding with Integrated Circuits | Tutorials | Study Tools

 

Introduction

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Last week, we discussed the basic logical concepts AND, OR, and NOT. This week, we examine how these operations are implemented in electronic circuits called logic gates. Gates are the basic building blocks of digital electronics.

 

Positive and Negative Logic

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Logic gates representing the AND, OR, and NOT functions are built using transistors as switches to route power (a logic HIGH) or ground (a logic LOW) to the OUTPUT of the circuit based on the condition of the INPUTS. Using our car examples from last week, the engine will start when BOTH the button pushed and tag identified inputs to an AND gate are true. In the same way, the interior light will turn on when ANY of the door open inputs to an OR gate are true.

We can combine the AND, OR, and NOT functions to create the NAND (NOT AND) and NOR (NOT OR) functions. The NAND and NOR functions create the OPPOSITE of the AND function or the OR function, respectively, AFTER the basic function has been performed.

One example of the NAND function is the following: two inputs are applied to an AND gate (digital circuit performing AND function) - one is HIGH and the other is LOW. The resulting output would be LOW since NOT all of the inputs are HIGH. This LOW then has the NOT function (inversion) performed to generate a logic HIGH. The NAND function performs the AND operation first, and then performs the NOT operation.

One example of the NOR function is the following: two inputs are applied to an OR gate - one is HIGH and the other is LOW. The resulting output would be HIGH since ONE of the inputs is HIGH. This HIGH would have the NOT function (inversion) performed to generate a logic LOW. The NOR function performs the OR operation first, and then performs the NOT operation.

Although the NAND and NOR functions seem obscure at this point, we will soon see why they are useful in the design of digital circuits.

 

Gate Representations

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There is a variety of methods used to represent the basic digital functions and the circuits that implement these functions. Each method is useful in creating circuits that implement logic in the most efficient manner.

Boolean Algebra - Boolean algebra is a mathematical method used to describe the behavior and operation of digital logic. Boolean descriptions and relationships can help us design logic and predict the behavior of more complex digital systems.

The basic Boolean representations of the logic operations we have been discussing are illustrated below:

NOTES

  1. The line (bar) shown in the NAND and NOR function represents the NOT function.
  2. A and B represent Inputs to the function while X represents the result or Output from the function.
  3. The multiplication (AND) and addition (OR) are very similar to arithmetic, as you know it. They aren't, however, exactly the same, as you'll see below.
  4. Alternate representation, without the over bar, notA, not(A + B), etc.

Truth Tables - Another method used to describe the operation of logic functions is called a truth table. A truth table describes the behavior of a digital circuit based on all of the input conditions. Each input condition will produce a HIGH or LOW output or outputs. The size of a truth table is determined by the number of inputs, since the number of inputs determines how many unique input conditions exist. For any circuit, if the number of inputs is N, then the number of rows in the truth table (each row is a unique input condition) is simply 2N.

The truth tables for the AND, OR, NOT, NAND, and NOR functions are illustrated below:

Truth Tables for Basic Logic Functions

The figure consists of 5 tables representing the truth tables for

  1. AND GATE where X(AND) = A.B
  2. OR GATE Where Y(OR) = A+B
  3. NAND GATE where X(NAND) = (A.B) with a bar on top representing the complement of the product
  4. NOR GATE where Y(NOR) = (A+B) with a bar on top representing the complement of the sum
  5. NOT GATE Where the output is A with a bar on top representing the complement of A

Table: AND GATE where X(AND) = A.B

First Column: Value of A input
Second Column: Value of B input
Third Column:  Value of
AND GATE where X(AND) = A.B
Inputs giving Outputs:
A = 0 B=0 X = 0
A = 0 B=1 X = 0
A = 1 B=0 X = 0
A = 1 B=1 X = 1

Table: OR GATE Where Y(OR) = A+B

First Column: Value of A input
Second Column: Value of B input
Third Column:  Value of
OR GATE Where Y(OR) = A+B
Inputs giving Outputs:
A = 0 B=0 Y = 0
A = 0 B=1 Y = 1
A = 1 B=0 Y = 1
A = 1 B=1 Y = 1

Table: NAND GATE where X(NAND) = (A.B) with a bar on top representing the complement of the product

First Column: Value of A input
Second Column: Value of B input
Third Column:  Value of
NAND GATE where X(NAND) = (A.B) with a bar on top representing the complement of the product
Inputs giving Outputs:
A = 0 B=0 X = 1
A = 0 B=1 X = 1
A = 1 B=0 X = 1
A = 1 B=1 X = 0

Table: NOR GATE where Y(NOR) = (A+B) with a bar on top representing the complement of the sum

First Column: Value of A input
Second Column: Value of B input
Third Column:  Value of
NOR GATE where Y(NOR) = (A+B) with a bar on top representing the complement of the sum
Inputs giving Outputs:
A = 0 B=0 Y = 1
A = 0 B=1 Y = 0
A = 1 B=0 Y = 0
A = 1 B=1 Y = 0

Table: NOT GATE Where the output is A with a bar on top representing the complement of A

First Column: Value of A input
Second Column: Value of B input
Third Column:  Value of
NOT GATE Where the output is A with a bar on top representing the complement of A
Inputs giving Outputs:
A = 0 X = 1
A = 0 X = 1
A = 1 X = 0
A = 1 X = 0

Image Description

Remember that the truth table for a function and the Boolean representation for that function are just two different methods of describing that function. Each has benefits in circuit design. Next week, we will see how we can describe a complex logic operation using truth tables, then use Boolean algebra to produce the simplest circuit to implement that design.

Gate Symbols - A third method of describing digital gates is symbolic. Each gate has a symbol that represents it in a diagram of the overall circuit (schematic). The gate representations are shown below:

"Basic Logic Gates"

This illustration shows the basic and distinct shape symbols for the AND, OR, NAND, NOR, and NOT gates.

The AND looks like a square connected to a half a circle (bullet shaped Side view) is shown as a two parallel horizontal lines on the left indicating the two inputs going into a vertical straight line.  The right hand side of the gate is a concave line drawing with extended top and bottom lines. The vertical straight line marks the end of the Concave line drawing of this section of the gate.  A single line comes out of the middle of the concave section of the gate representing the output.

The NAND gate is the same as the AND gate except for a “bubble” indicated by a small circle at its output This indicates the inversion.  This NAND gate has two inputs and one output.

The OR gate looks like the AND gate except for (1) the straight vertical line is concaved in at the input side and the half a circle shape is pointed instead of curved.  Again this OR gate has two lines as input and one line as output.

The NOR gate is the same as the OR gate except for a “bubble” indicated by a small circle at its output this indicates the inversion.  This NOR has two inputs and one output.

The NOT gate is shown as a ONE horizontal line on the left indicating the one  input going into the flat side of a triangle.  The right hand side of the gate is a line drawing of a triangle with the point of the triangle pointing directly to the right.  A single line comes out of the middle of the pointed section of the triangle representing the output.  A polarity indicator or “bubble” indicated by a small circle sits at the intersection of the point of the triangle section of the gate and the output horizontal line.

Image Description

The bubble symbols on the NAND, NOR, and NOT outputs mean INVERT (change a 1 to a 0 OR a 0 to a 1). These symbols can be used to help us predict the output behavior of a logic circuit.

Timing Diagrams - A timing diagram is a plot which displays the precise relationship between two or more digital waveforms as they vary relative to time. Timing diagrams are critical in evaluating and analyzing the performance of a logic circuit, showing the time relationship between inputs and outputs.

An example of a timing diagram for an OR gate with inputs A and B and output Y is shown below:

"OR Gate Timing Diagrams"

Three waveforms are lined up by time in this illustration to show the relationship between the inputs A and B and outputs of the OR gate in terms of a timing diagram.
The three waveforms are labeled A, B and Y. 

  • A and B represent the input voltage timing diagram as a digital wave (discrete values of one’s an zeros) 
  • The Y represents the output voltage value of the OR gate.  Three complete time periods are shown. 

The A Wave starts at 0 (low) then 1(high) then 0 then 1 then 0
The B Wave starts at 0, then 0 then 1 then 1 then 0
The output is Y which is 0 then 1 then 1 then 1 then zero.  Please note that the output starts at a small fraction of time later to represent a propagation delay

Image Description

The two inputs are the top two waveforms and the bottom waveform is the output. As you look at this, moving from left to right, note that any time an input is high (top two signals), the output (bottom signal) is high (which is the OR function). Also note that when the output changes from low to high or from high to low, the output does not change at the same time. This is a valid electrical characteristic called propagation delay, which simply means that it takes time for an output to respond to a change in input conditions. Propagation delay is what limits the speed of digital circuits (although with delays under 10 nanoseconds, we can still do lots of operations in a very short time).

Simulation Logic: AND, OR
Simulation Logic: NOT, NAND, NOR
Simulation Boolean Identities

 

Data Sheets

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Data sheets describe the electrical characteristics and the behavior of electrical components. The information included on data sheets is used to help determine whether the device is functioning properly and what electrical considerations are needed in order to use the device in a circuit.

In digital logic, the components are packaged as integrated circuits (ICs). We need to be able to identify the physical pin numbers on the appropriate IC to connect the correct physical pin to the correct point in the circuit. We need to know electrical characteristics, such as the voltage range for a logic HIGH and logic LOW, on the device we are using. We need to know how much current the gate's output can handle in order to avoid overloading the output.

Download the data sheet for the 74LS00 NAND gate from Doc Sharing -- the Datasheets category (use the drop down arrow) and print out a copy for yourself. The following is a brief overview of some of the characteristics of this device that we need to know:

In the upper portion of the the first page, there are diagrams of the different IC configurations available. We will be using the Standard Plastic package at the upper left of the page. This diagram shows the pin numbers for the FOUR unique two-input NAND gates found within this IC. The packaging of four individual gates in one package is why the name of this IC is Quadruple 2_Input Positive-NAND Gates.

To use one of these gates correctly, you have to use the inputs that go with the associated output. The inputs and outputs are designated by numbers and letters, such as 1A and 1B (inputs to a NAND gate with an output labeled 1Y). The pin numbers are 1 (1A), 2 (1B), and 3 (1Y) for these inputs and outputs. For the IC to function properly, it needs POWER (Vcc = +5VDC) and GROUND (Gnd = 0VDC) from a DC power supply. Vcc is found on pin 14 and Gnd is found on pin 7.

At the bottom of front page is the Boolean expression of the NAND gate shown in two different forms. These are:

Both of these Boolean expressions give us the same truth table. The first expression can be interpreted to mean that Y is LOW when A and B are both HIGH. The second expression can be interpreted to mean that Y is HIGH any time A is LOW or B is LOW. Next week, we will investigate the rules of Boolean algebra and see how these expressions are equal using a rule known as DeMorgan's Theorem.

Two additional basic characteristics for this device are shown at the bottom of the second page - the truth table and schematic symbol. The truth table is shown slightly differently than what we have previously seen for the NAND gate; there are only three rows:

A

B

X

H

H

L

L

X

H

X

L

H

An X shown on a digital input means "don't care" or, more specifically, it means that this input can be either HIGH or LOW without affecting the output. In the case of the NAND gate, the first line shows the only condition under which we will have a LOW output (when inputs A and B are both HIGH). Any other condition, when either A or B has an L (LOW) on its input, the output will be H (HIGH). This is why the other input is indicated as don't care or X. As important as our interpretation of this truth table is, the more practical aspect of seeing this truth table is to make sure that we are selecting the correct device.

On page four of the data sheet, we see the various voltage ranges for inputs, outputs, and supply.

The information contained in data sheets is necessary for you to have when you are determining whether a logic circuit is responding properly to its input conditions. Use data sheets liberally and wisely - they can save you a lot of grief and confusion.

 

Logic Circuit Schematic

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Logic circuits are typically drawn with schematic capture packages, such as MultiSim and other software programs. Many of these packages contain simulators that can be used for virtual test purposes.

The process requires you to find the device in the program library, place it on the schematic page, and then connect the devices to one another based on the type of logic circuit you want to implement. This process is similar to, but slightly different from, the techniques you have been using to create and simulate analog circuits.

An illustration of a logic circuit created in MultiSim, consisting of multiple logic gates, is shown below:

Sample MultiSim Circuit Schematic

Sample Multisim Schematic:

An illustration of a logic circuit created with “Multisim” consisting of 3 gates with the prospective designations as follows”

  1. A 2-input AND Gate Labeled as 74LS08D with sub-label U2 A
  2. A 2-input OR  Gate Labeled as 74LS32D with sub-label U3 A
  3. An Inverter (NOT Gate) Labeled as 74LS04D with sub-label U1 A
The left hand of the figure shows the three inputs labeled input A, input B and input C.  Inputs A and B go into an AND gate.   Input C goes into an inverter or NOT gate The output of the AND gate goes into the first input of an OR gate.   The output of the NOT gate goes into the second input of an OR gate.  The output of the OR gate is the output of the circuit and is designated “Y”.

Image Description

In this circuit, Input_A and Input_B are connected to the AND gates inputs. Note that the gate has two labels, one indicating an association with a specific chip (U2A means that this represents the A circuit in the chip designed U2) and one indicating the specific IC used (the 74LS08D is a Quad 2-Input AND gate). The output of the AND gate is connected to one of the inputs on the OR gate (labeled U3A and 74LS32). The other input for the OR gate is connected to the output of the INVERTER (U1A and 74LS04). The circuit has three inputs and one output, with three logic devices used to perform the desired logic function.

 

Boolean Expressions for Logic Circuits

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Writing a Boolean expression for a logic circuit is not difficult but, like anything new, it can be confusing. A process that can be used is to go stage by stage (or gate by gate), create the Boolean expression for the output in terms of its inputs, then use those outputs as inputs to the next stage and repeat the process. Here's how to apply this process for the circuit illustrated below:

Here's how to apply this process for the circuit illustrated below:

An illustration of a logic circuit created with “Multisim” consisting of 3 gates with the prospective designations as follows”

  1. A 2-input AND Gate Labeled as 74LS08D with sub-label U2 A
  2. A 2-input OR  Gate Labeled as 74LS32D with sub-label U3 A
  3. An Inverter (NOT Gate) Labeled as 74LS04D with sub-label U1 A

The left hand of the figure shows the three inputs labeled input A, input B and input C.  Inputs A and B go into an AND gate.   Input C goes into an inverter or NOT gate The output of the AND gate goes into the first input of an OR gate.   The output of the NOT gate goes into the second input of an OR gate.  The output of the OR gate is the output of the circuit and is designated “Y”.

Image Description

Labeling the output of the AND gate as ANDOut, the Boolean expression is:

The output of the inverter is labeled NOTOut and is:

These first two midterms are then used as inputs to the OR gate. The output of the OR gate is:


 

 

To determine the operation of this circuit, we simply need to construct a truth table:

Input_A

Input_B

Input_C

Output_Y

0

0

0

1

0

0

1

0

0

1

0

1

0

1

1

0

1

0

0

1

1

0

1

0

1

1

0

1

1

1

1

1


 

Breadboarding with Integrated Circuits

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The illustrations below show how to place a fixed function IC (74LS00 - quad dual-input NAND gate) on a breadboard, wire it to power, connect logic level input voltages to a gate, and monitor the logic level output using an LED (light-emitting diode). Below is a series of graphics to help you begin building a digital circuit that you can test.

Place IC on Breadboard

Place IC on a Breadboard:

A picture of an Integrated Circuit (IC) is shown on a breadboard in this picture. The IC is shown approximately 1 inch X 3.5 inches and is oriented horizontally with the notched end of the black casing on the left hand side. The IC is shown with the 7 legs on the left hand side of the chip mounted into the holes in a breadboard marked 31, 32, 33, 34, 35, and 36. The body of the IC straddles the ½" divider with no holes. The IC is shown with the 7 legs on the right hand side of the chip mounted into the holes in a breadboard on the other side of the divider. There are two lines of white writing on the black body of the IC. The IC is marked 84C4D4 in white lettering on the first line. The IC has the symbol for the MITSUBISHI manufacturing company on the second line and M74LS00P follows the symbol.

Image Description

The picture above illustrates where to place a DIP packaged IC on a breadboard. This IC must straddle the center separation to prevent multiple inputs and/or outputs from being connected to each other (creating short circuits).

The physical pin placement information is available, as we saw earlier in this lecture, from the data sheet for the part. Pin 1 on this type of IC package (called a DIP configuration, where DIP stands for dual inline pins since there are two rows of pins) is always the pin located next to a dot or physical indentation in the middle of the IC. The remaining pins are counted as follows:

Pins 1-7 - bottom row above, from left to right.

Pins 8-14 - top row above, from right to left.

Electrical Pinout on Gate:

The picture illustrates a picture of an Integrated Circuit (IC) and its pin diagram from the data sheet is shown in this picture as follows

  • The Picture shows a Texas Instrument Manufacturing SN7400N and 7645 label as well
  • The pin diagram from the data sheet is shown at the top of this picture.   The legend calls this diagram the “7400”.  The pin diagram is approximately 1.5 inches X 4 inches in size.  The body of the IC is shown as a line drawing of a rectangle.  The left hand side of the IC has a concave notch marked in the side.  There are 7 small ¼ inch rectangles evenly spaced out across the top and bottom of the IC designating the pins.  Pins 1, 7 8 and 14 are designated on the diagram.  Pin 1 is the first rectangle marked on the left bottom of the diagram.  Pin 7 is the last rectangle marked on the right bottom of the diagram.  Pin 14 is the first rectangle at the left top of the diagram and pin 8 is the last rectangle marked at the right top of the diagram.  Pin 7 has a marking showing that this pin is to be grounded.  The ground symbol shows a black dot inside the rectangle for Pin 7 with a short vertical line attached.  The vertical line ends in two horizontal lines,  with the larger line horizontal line  on top of the smaller horizontal line.  Pin 14 has a marking showing that this pin is to be connected to a 5 volt power supply.  The symbol for the power supply shows a black dot inside the rectangle for pin 14 with a short vertical line attached to it.  The short vertical line ends in an arrow head and is marked “+5V”.   Inside the body of the IC, pin 7 is marked with the text “GND” .  Inside the body of the IC, pin 14 is marked “VCC”.  Inside the body of the IC, pin 1 is marked with a black dot.  Inside the body of the IC, four AND gates and shown.  Gate 1 has inputs from Pins 1 and 2 with output at Pin 3. Gate 2 has inputs from Pins 4 and 5 with output at Pin 6. Gate 3 has inputs from Pins 9 and 10 with output at Pin 8. Gate 4 has inputs from Pins 12 and 13 with output at Pin 11.

The IC is shown at the bottom of this picture.  The IC is shown approximately 1 inch X 3.5 inches and is oriented horizontally with the notched end of the black casing on the left hand side.  The IC is shown with the 7 legs on the left hand side of the chip .  The entire leg can be seen for all of the legs on the bottom of the IC.  Only the top of the legs can be seen for the legs on the top of the IC.   There are two lines of white writing on the black body of the IC.   The IC is marked SN 7400N in white lettering on the first line.  The IC has the symbol for Texas Instruments  manufacturing company on the middle left section of its body.  The second line or writing reads 7645

Image Description

We can see from the pin diagram above, for example, that one gate has Pins 1 and 2 as its two inputs and Pin 3 as its output. To test this gate, you have to apply ALL logic level inputs on pins 1 and 2, while monitoring the output on pin 3. To have the IC function at all, we must apply +5VDC to pin 14 (Vcc) and 0VDC to pin 7 (GND).

An illustration of this IC wired to test its functionality is shown below. There are three LEDs, with resistors in series with them, used to illustrate a HIGH and a LOW on any of the inputs or outputs of the gate connected to pins 1, 2, and 3.

Gate Ready for Testing

Gate Ready for Testing:

The picture is part of a circuit showing the 7400 (NAND Gate) diagram connected on a bread board as follows:

  1. Pin 14 is connected to power via a burgundy Wire
  2. Pin 7 is connected to Ground via a black wire
  3. The two inputs are connected to PIN 1 and 2 Respectively with Green Wire as well as 2 LED Indicator as follows
    1. From Pin 1 – to resistor that appears to be Brown Brown Brown color code (220 Ohms Resistor) which then connected to a green LED
    2. From Pin 2 – to resistor that appears to be Brown Brown Brown color code (220 Ohms Resistor) which then connected to a green LED
  4. The output is connected to PIN 3 with a tan wire as well as a green LED in series with 220 resistors.

Image Description


 

Tutorials

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VideoBoolean Expressions for Two Layer Gate Systems

Video DeMorgan's Theorem

 

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